183 search results - page 7 / 37 » A case for multi-level main memory |
171
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ANTSW
2004
Springer
15 years 7 months ago
2004
Springer
ed Abstract We present two heuristic mesh-partitioning methods, both of which build on the multiple ant-colony algorithm in order to improve the quality of the mesh partitions. The...
132
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ICCS
2004
Springer
15 years 8 months ago
2004
Springer
On cc-NUMA multi-processors, the non-uniformity of main memory latencies motivates the need for co-location of threads and data. We call this special form of data locality, geogra...
112
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IPPS
2000
IEEE
15 years 7 months ago
2000
IEEE
Time skewing is a compile-time optimization that can provide arbitrarily high cache hit rates for a class of iterative calculations, given a sufficient number of time steps and s...
150
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ESTIMEDIA
2009
Springer
15 years 1 months ago
2009
Springer
Abstract--Memory accesses are a major cause of energy consumption for embedded systems and the stack is a frequent target for data accesses. This paper presents a fully software te...
134
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ASIAN
2004
Springer
15 years 8 months ago
2004
Springer
A central problem in extending the von Neumann architecture to petaflop computers with millions of hardware threads and with a shared memory is defining the memory model [Lam79,...