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DAC
2009
ACM
15 years 12 hour ago
Analysis and mitigation of process variation impacts on Power-Attack Tolerance
Embedded cryptosystems show increased vulnerabilities to implementation attacks such as power analysis. CMOS technology trends are causing increased process variations which impac...
Lang Lin, Wayne P. Burleson
PATMOS
2007
Springer
14 years 5 months ago
Soft Error-Aware Power Optimization Using Gate Sizing
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
Foad Dabiri, Ani Nahapetian, Miodrag Potkonjak, Ma...
ARVLSI
1997
IEEE
104views VLSI» more  ARVLSI 1997»
14 years 3 months ago
A High-Speed Asynchronous Decompression Circuit for Embedded Processors
This paper describes the architecture and implementation of a high-speed decompression engine for embedded processors. The engine is targeted to processors where embedded programs...
Martin Benes, Andrew Wolfe, Steven M. Nowick
FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
14 years 3 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
FUZZY
1997
Springer
166views Fuzzy Logic» more  FUZZY 1997»
14 years 3 months ago
Optimizing Video Signal Processing Algorithms by Evolution Strategies
Today many kinds of postprocessing are used in digital TV receivers or multimedia terminals for video signals to enhance the picture quality. To achieve this the properties of hum...
H. Blume, O. Franzen, M. Schmidt