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» A cis-regulatory logic simulator
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DAC
2000
ACM
14 years 9 months ago
Symbolic timing simulation using cluster scheduling
We recently introduced symbolic timing simulation (STS) using data-dependent delays as a tool for verifying the timing of fullcustom transistor-level circuit designs, and for the ...
Clayton B. McDonald, Randal E. Bryant
TARK
1998
Springer
14 years 25 days ago
Simulative Inference About Nonmonotonic Reasoners
If one has attributed certain initial beliefs to an agent, it is sometimes possible to reason about further beliefs the agent must hold by observing what conclusions one's ow...
Aaron N. Kaplan
CEC
2003
IEEE
14 years 1 months ago
Digital circuit design through simulated evolution (SimE)
In this paper, the use of Simulated Evolution (SimE) Algorithm in the design of digital logic circuits is proposed. SimE algorithm consists of three steps: evaluation, selection an...
Sadiq M. Sait, Mostafa Abd-El-Barr, Uthman S. Al-S...
ERSHOV
2001
Springer
14 years 1 months ago
Resolution and Binary Decision Diagrams Cannot Simulate Each Other Polynomially
There are many different ways of proving formulas in proposition logic. Many of these can easily be characterized as forms of resolution (e.g. [12] and [9]). Others use so-called...
Jan Friso Groote, Hans Zantema
SIGGRAPH
2010
ACM
14 years 22 days ago
Unified simulation of elastic rods, shells, and solids
We develop an accurate, unified treatment of elastica. Following the method of resultant-based formulation to its logical extreme, we derive a higher-order integration rule, or el...
Sebastian Martin, Peter Kaufmann, Mario Botsch, Ei...