Simulated annealing is a general optimisation algorithm, based on hill-climbing. As in hill-climbing, new candidate solutions are selected from the ‘neighbourhood’ of the curre...
Lars Nolle, Alec Goodyear, Adrian A. Hopgood, Phil...
At very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper pre...
Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, ...
Abstract— This paper explores the resistance of MOS Current Mode Logic (MCML) against Differential Power Analysis (DPA) attacks. Circuits implemented in MCML, in fact, have uniqu...
: Models of the association between input accuracy and output accuracy imply that, for any given application, the effect of input errors on the output error rate generally varies i...
We describe a highly accurate but e cient fault simulator for interconnect opens, based on characterizing the standard cell library with SPICE; using transistor charge equations f...