Sciweavers

479 search results - page 86 / 96
» A clustering technique to optimize hardware software synchro...
Sort
View
153
Voted
ICS
2004
Tsinghua U.
15 years 11 months ago
Adaptive incremental checkpointing for massively parallel systems
Given the scale of massively parallel systems, occurrence of faults is no longer an exception but a regular event. Periodic checkpointing is becoming increasingly important in the...
Saurabh Agarwal, Rahul Garg, Meeta Sharma Gupta, J...
CF
2011
ACM
14 years 5 months ago
SIFT: a low-overhead dynamic information flow tracking architecture for SMT processors
Dynamic Information Flow Tracking (DIFT) is a powerful technique that can protect unmodified binaries from a broad range of vulnerabilities such as buffer overflow and code inj...
Meltem Ozsoy, Dmitry Ponomarev, Nael B. Abu-Ghazal...
DEBS
2010
ACM
15 years 8 months ago
Workload characterization for operator-based distributed stream processing applications
Operator-based programming languages provide an effective development model for large scale stream processing applications. A stream processing application consists of many runtim...
Xiaolan J. Zhang, Sujay Parekh, Bugra Gedik, Henri...
DAC
2002
ACM
16 years 6 months ago
Scheduler-based DRAM energy management
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
Victor Delaluz, Anand Sivasubramaniam, Mahmut T. K...
PLDI
2003
ACM
15 years 10 months ago
Compile-time dynamic voltage scaling settings: opportunities and limits
With power-related concerns becoming dominant aspects of hardware and software design, significant research effort has been devoted towards system power minimization. Among run-t...
Fen Xie, Margaret Martonosi, Sharad Malik