Sciweavers

468 search results - page 71 / 94
» A compiler for high performance computing with many-core acc...
Sort
View
DAC
2004
ACM
14 years 8 months ago
Data compression for improving SPM behavior
Scratch-pad memories (SPMs) enable fast access to time-critical data. While prior research studied both static and dynamic SPM management strategies, not being able to keep all ho...
Ozcan Ozturk, Mahmut T. Kandemir, I. Demirkiran, G...
WCRE
2002
IEEE
14 years 15 days ago
Register Liveness Analysis for Optimizing Dynamic Binary Translation
Dynamic binary translators compile machine code from a source architecture to a target architecture at run time. Due to the hard time constraints of just-in-time compilation only ...
Mark Probst, Andreas Krall, Bernhard Scholz
ERSA
2006
129views Hardware» more  ERSA 2006»
13 years 9 months ago
Group-Alignment based Accurate Floating-Point Summation on FPGAs
Floating-point summation is one of the most important operations in scientific/numerical computing applications and also a basic subroutine (SUM) in BLAS (Basic Linear Algebra Sub...
Chuan He, Guan Qin, Mi Lu, Wei Zhao
TJS
2002
118views more  TJS 2002»
13 years 7 months ago
The MAGNeT Toolkit: Design, Implementation and Evaluation
Abstract-The current trend in constructing high-performance computing systems is to connect a large number of machines via a fast interconnect or a large-scale network such as the ...
Wu-chun Feng, Mark K. Gardner, Jeffrey R. Hay
CODES
2006
IEEE
13 years 11 months ago
Automatic phase detection for stochastic on-chip traffic generation
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
Antoine Scherrer, Antoine Fraboulet, Tanguy Risset