144 search results - page 21 / 29 » A compiler framework for the reduction of worst-case executi... |
ARC
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. Memory accesses contribute sunstantially to aggregate system delays. It is critical for designers to ensure that the memory subsystem is designed efficiently, and much wo...
RTSS
2003
IEEE
14 years 27 days ago
2003
IEEE
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
ASPLOS
1994
ACM
13 years 11 months ago
1994
ACM
Several researchers have proposed algorithms for basic block reordering. We call these branch alignment algorithms. The primary emphasis of these algorithms has been on improving ...
PPPJ
2009
ACM
14 years 8 days ago
2009
ACM
The usage of cellular phones, PDAs, and other mobile devices has increased dramatically over the past ten years. Java is targeted to be one of the most popular execution environme...
MICRO
2006
IEEE
14 years 1 months ago
2006
IEEE
The superblock is a scheduling region which exposes instruction level parallelism beyond the basic block through speculative execution of instructions. In general, scheduling supe...