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ISCA
2008
IEEE
165views Hardware» more  ISCA 2008»
14 years 3 months ago
Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory
We demonstrate how fine-grained memory protection can be used in support of transactional memory systems: first showing how a software transactional memory system (STM) can be m...
Lee Baugh, Naveen Neelakantam, Craig B. Zilles
SPAA
2010
ACM
14 years 1 months ago
Lightweight, robust adaptivity for software transactional memory
When a program uses Software Transactional Memory (STM) to synchronize accesses to shared memory, the performance often depends on which STM implementation is used. Implementation...
Michael F. Spear
SPAA
2009
ACM
14 years 9 months ago
Brief announcement: selfishness in transactional memory
In order to be efficient with selfish programmers, a multicore transactional memory (TM) system must be designed such that it is compatible with good programming incentives (GPI),...
Raphael Eidenbenz, Roger Wattenhofer
DAC
2012
ACM
11 years 11 months ago
STM concurrency control for embedded real-time software with tighter time bounds
We consider software transactional memory (STM) concurrency control for multicore real-time software, and present a novel contention manager (CM) for resolving transactional con...
Mohammed El-Shambakey, Binoy Ravindran
MICRO
2010
IEEE
189views Hardware» more  MICRO 2010»
13 years 6 months ago
A Dynamically Adaptable Hardware Transactional Memory
Most Hardware Transactional Memory (HTM) implementations choose fixed version and conflict management policies at design time. While eager HTM systems store transactional state in-...
Marc Lupon, Grigorios Magklis, Antonio Gonzá...