Sciweavers

433 search results - page 59 / 87
» A computer support tool for the early stages of architectura...
Sort
View
DAC
2009
ACM
14 years 2 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
CLUSTER
2006
IEEE
14 years 2 months ago
Open MPI: A High-Performance, Heterogeneous MPI
The growth in the number of generally available, distributed, heterogeneous computing systems places increasing importance on the development of user-friendly tools that enable ap...
Richard L. Graham, Galen M. Shipman, Brian Barrett...
EMSOFT
2005
Springer
14 years 1 months ago
Model-based run-time monitoring of end-to-end deadlines
The correct interplay among components in a distributed, reactive system is a crucial development task, particularly for embedded systems such as those in the automotive domain. M...
Jaswinder Ahluwalia, Ingolf H. Krüger, Walter...
JCDL
2006
ACM
99views Education» more  JCDL 2006»
14 years 1 months ago
Using resources across educational digital libraries
This article reports on analyses of usage and design activities by users of the Instructional Architect (IA), an end-user authoring tool designed to support easy access to and use...
Mimi Recker, Bart Palmer
IWOMP
2007
Springer
14 years 2 months ago
Supporting OpenMP on Cell
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...