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ICCAD
2009
IEEE
119views Hardware» more  ICCAD 2009»
13 years 6 months ago
Iterative layering: Optimizing arithmetic circuits by structuring the information flow
Current logic synthesis techniques are ineffective for arithmetic circuits. They perform poorly for XOR-dominated circuits, and those with a high fan-in dependency between inputs ...
Ajay K. Verma, Philip Brisk, Paolo Ienne
BMCBI
2008
97views more  BMCBI 2008»
13 years 8 months ago
Quantitative analysis of numerical solvers for oscillatory biomolecular system models
Background: This article provides guidelines for selecting optimal numerical solvers for biomolecular system models. Because various parameters of the same system could have drast...
Chang F. Quo, May D. Wang
FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
14 years 3 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk
CASES
2006
ACM
14 years 2 months ago
A dynamic code placement technique for scratchpad memory using postpass optimization
In this paper, we propose a fully automatic dynamic scratchpad memory (SPM) management technique for instructions. Our technique loads required code segments into the SPM on deman...
Bernhard Egger, Chihun Kim, Choonki Jang, Yoonsung...
ARCS
2008
Springer
13 years 10 months ago
An Optimized ZGEMM Implementation for the Cell BE
: The architecture of the IBM Cell BE processor represents a new approach for designing CPUs. The fast execution of legacy software has to stand back in order to achieve very high ...
Timo Schneider, Torsten Hoefler, Simon Wunderlich,...