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IJIT
2004
13 years 8 months ago
Adaptive Algorithm to Predict the QoS of Web Processes and Workflows
Workflow Management Systems (WfMS) allow organizations to streamline and automate business processes and reengineer their structure. One important requirement for this type of syst...
Jorge Cardoso
DAC
2002
ACM
14 years 7 months ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
SBCCI
2006
ACM
200views VLSI» more  SBCCI 2006»
14 years 21 days ago
REDEFIS: a system with a redefinable instruction set processor
The growing complexity and production cost of processor-based systems have imposed big constraints in SoC design of new systems. GPPs and ASICs are unable to fit the tight perform...
Victor M. Goulart Ferreira, Lovic Gauthier, Takayu...
JIRS
2007
108views more  JIRS 2007»
13 years 6 months ago
Task-based Hardware Reconfiguration in Mobile Robots Using FPGAs
This paper presents a methodology for the realization of intelligent, task-based reconfiguration of the computational hardware for mobile robot applications. Task requirements are ...
Sesh Commuri, V. Tadigotla, L. Sliger
CC
2008
Springer
240views System Software» more  CC 2008»
13 years 8 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David