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HPCA
1999
IEEE
14 years 2 days ago
Impulse: Building a Smarter Memory Controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
John B. Carter, Wilson C. Hsieh, Leigh Stoller, Ma...
ICS
1999
Tsinghua U.
14 years 1 days ago
Improving the performance of speculatively parallel applications on the Hydra CMP
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
Kunle Olukotun, Lance Hammond, Mark Willey
ICDCS
1997
IEEE
14 years 2 hour ago
Effect of Connection Rerouting on Application Performance in Mobile Networks
—The increasing deployment of wireless access technology, along with the emergence of high speed integrated service networks, such as ATM, promises to provide mobile users with u...
Partho Pratim Mishra, Mani B. Srivastava
DATE
2008
IEEE
121views Hardware» more  DATE 2008»
13 years 9 months ago
Constraint Refinement for Online Verifiable Cross-Layer System Adaptation
Adaptive resource management is critical to ensuring the quality of real-time distributed applications, particularly for energy-constrained mobile handheld devices. In this contex...
Minyoung Kim, Mark-Oliver Stehr, Carolyn L. Talcot...
GLOBECOM
2007
IEEE
13 years 9 months ago
Adaptive Radio Resource Allocation in Hierarchical QoS Scheduling for IEEE 802.16 Systems
— Future mobile communication systems such as IEEE 802.16 are expected to deliver a variety of multimedia services with diverse QoS requirements. To guarantee the QoS provision, ...
Hua Wang, Lars Dittmann