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ISCA
2008
IEEE
137views Hardware» more  ISCA 2008»
14 years 2 months ago
Self-Optimizing Memory Controllers: A Reinforcement Learning Approach
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...
Engin Ipek, Onur Mutlu, José F. Martí...
ECIS
2003
13 years 9 months ago
Conceptual design of www-based information systems
Today, companies and their information systems are facing a very dynamic and fast changing environment. Fast changing demands require varying information in varying places. Users ...
Jörg Becker, Christian Brelage, Michael Thygs...
ECRTS
2003
IEEE
14 years 1 months ago
Schedulability Analysis for Distributed Heterogeneous Time/Event Triggered Real-Time Systems
This paper deals with specific issues related to the design of distributed embedded systems implemented with mixed, event-triggered and time-triggered task sets, which communicate...
Traian Pop, Petru Eles, Zebo Peng
CODES
2002
IEEE
14 years 27 days ago
Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systems
This paper deals with specific issues related to the design of distributed embedded systems implemented with mixed, eventtriggered and time-triggered task sets, which communicate ...
Traian Pop, Petru Eles, Zebo Peng
CODES
2006
IEEE
14 years 2 months ago
Design space exploration of real-time multi-media MPSoCs with heterogeneous scheduling policies
Real-time multi-media applications are increasingly being mapped onto MPSoC (multi-processor system-on-chip) platforms containing hardware-software IPs (intellectual property) alo...
Minyoung Kim, Sudarshan Banerjee, Nikil Dutt, Nali...