17 search results - page 3 / 4 » A fast on-chip profiler memory |
WSC
1997
13 years 8 months ago
1997
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
KDD
2004
ACM
14 years 7 months ago
2004
ACM
Abstract. We present a Context Ultra-Sensitive Approach based on two-step Recommender systems (CUSA-2step-Rec). Our approach relies on a committee of profile-specific neural networ...
ICCAD
2002
IEEE
14 years 3 months ago
2002
IEEE
Embedded system programs tend to spend much time in small loops. Introducing a very small loop cache into the instruction memory hierarchy has thus been shown to substantially red...
ARCS
2006
Springer
13 years 10 months ago
2006
Springer
Abstract. Data cache compression is actively studied as a venue to make better use of onchip transistors, increase apparent capacity of caches, and hide the long memory latencies. ...
MEDIAFORENSICS
2010
13 years 8 months ago
2010
In this paper, we propose a practical approach to minimizing embedding impact in steganography based on syndrome coding and trellis-coded quantization and contrast its performance...