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» A framework for QoS-aware software components
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DAC
2000
ACM
14 years 8 months ago
Hardware-software co-design of embedded reconfigurable architectures
In this paper we describe a new hardware/software partitioning approach for embedded reconfigurable architectures consisting of a general-purpose processor (CPU), a dynamically re...
Yanbing Li, Tim Callahan, Ervan Darnell, Randolph ...
IPPS
2007
IEEE
14 years 1 months ago
The Design and Implementation of Checkpoint/Restart Process Fault Tolerance for Open MPI
To be able to fully exploit ever larger computing platforms, modern HPC applications and system software must be able to tolerate inevitable faults. Historically, MPI implementati...
Joshua Hursey, Jeffrey M. Squyres, Timothy Mattox,...
MATA
2004
Springer
199views Communications» more  MATA 2004»
14 years 23 days ago
Configuration Management for Networked Reconfigurable Embedded Devices
Distribution of product updates to embedded devices can increase product lifetimes for consumers and boost revenues for vendors. Dynamic provisioning of application solutions to e...
Timothy O'Sullivan, Richard Studdert
FM
2006
Springer
113views Formal Methods» more  FM 2006»
13 years 11 months ago
Interface Input/Output Automata
We propose a new look at one of the most fundamental types of behavioral interfaces: discrete time specifications of communication--directly related to the work of de Alfaro and H...
Kim Guldstrand Larsen, Ulrik Nyman, Andrzej Wasows...
ETS
2007
IEEE
128views Hardware» more  ETS 2007»
13 years 9 months ago
Selecting Power-Optimal SBST Routines for On-Line Processor Testing
Software-Based Self-Test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical embedded system applications. Among the mo...
Andreas Merentitis, Nektarios Kranitis, Antonis M....