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CGO
2004
IEEE
13 years 11 months ago
Specialized Dynamic Optimizations for High-Performance Energy-Efficient Microarchitecture
We study several major characteristics of dynamic optimization within the PARROT power-aware, trace-cachebased microarchitectural framework. We investigate the benefit of providin...
Yoav Almog, Roni Rosner, Naftali Schwartz, Ari Sch...
MICRO
2005
IEEE
144views Hardware» more  MICRO 2005»
14 years 1 months ago
A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance
Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardw...
Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vi...
DATE
2009
IEEE
155views Hardware» more  DATE 2009»
14 years 2 months ago
Dynamic thermal management in 3D multicore architectures
— Technology scaling has caused the feature sizes to shrink continuously, whereas interconnects, unlike transistors, have not followed the same trend. Designing 3D stack architec...
Ayse Kivilcim Coskun, José L. Ayala, David ...
ICECCS
2009
IEEE
156views Hardware» more  ICECCS 2009»
13 years 5 months ago
Energy Efficient Duty Allocation Protocols for Wireless Sensor Networks
Wireless sensor networks require shared medium access management to prevent collisions, message corruption and other unhelpful effects. Cellular sensornets require minimal energy ...
Jonathan Tate, Iain Bate
ISLPED
2006
ACM
145views Hardware» more  ISLPED 2006»
14 years 1 months ago
An optimal analytical solution for processor speed control with thermal constraints
As semiconductor manufacturing technology scales to smaller device sizes, the power consumption of clocked digital ICs begins to increase. Dynamic voltage and frequency scaling (D...
Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Ch...