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COR
2008
131views more  COR 2008»
13 years 7 months ago
Queueing analysis of a server node in transaction processing middleware systems
Quantitative performance modeling of complex information systems is of immense importance for designing enterprise e-business infrastructures and applications. In this paper, we p...
Wei Xiong, Tayfur Altiok
VLSID
2005
IEEE
285views VLSI» more  VLSID 2005»
14 years 8 months ago
Power Monitors: A Framework for System-Level Power Estimation Using Heterogeneous Power Models
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
Nikhil Bansal, Kanishka Lahiri, Anand Raghunathan,...
ASPDAC
2006
ACM
230views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Statistical Bellman-Ford algorithm with an application to retiming
— Process variations in digital circuits make sequential circuit timing validation an extremely challenging task. In this paper, a Statistical Bellman-Ford (SBF) algorithm is pro...
Mongkol Ekpanyapong, Thaisiri Watewai, Sung Kyu Li...
INFOCOM
2009
IEEE
14 years 3 months ago
Delay-Optimal Opportunistic Scheduling and Approximations: The Log Rule
—This paper considers the design of opportunistic packet schedulers for users sharing a time-varying wireless channel from the performance and the robustness points of view. Firs...
Bilal Sadiq, Seung Jun Baek, Gustavo de Veciana
ASPDAC
2009
ACM
212views Hardware» more  ASPDAC 2009»
14 years 2 months ago
Timing analysis and optimization implications of bimodal CD distribution in double patterning lithography
Abstract— Double patterning lithography (DPL) is in current production for memory products, and is widely viewed as inevitable for logic products at the 32nm node. DPL decomposes...
Kwangok Jeong, Andrew B. Kahng