1013 search results - page 41 / 203 » A hardware implementation of realloc function |
CASES
2005
ACM
13 years 9 months ago
2005
ACM
Code compression is a field where compression ratios between compiler-generated code and subsequent compressed code are highly dependent on decisions made at compile time. Most op...
IPPS
2002
IEEE
14 years 23 days ago
2002
IEEE
This paper presents the implementation, on Virtex FPGAs, of a core generator for arbitrary numeric functions in fixed-point format. The cores use the state-of-theart multipartite...
ISMVL
1993
IEEE
13 years 12 months ago
1993
IEEE
Use of current-mode CMOS circuitsfor implementation of multiple-valued logic (MVL)functions has been considered in a number of recent papers. In this paper, we present an applicat...
FPL
2007
Springer
14 years 2 months ago
2007
Springer
Field-programmable circuits now have a capacity that allows them to accelerate floating-point computing, but are still missing core libraries for it. In particular, there is a ne...
ISCAS
2008
IEEE
14 years 2 months ago
2008
IEEE
— The lack of robust tamper-proofing techniques in security applications has provided attackers the ability to virtually circumvent mathematically strong cryptographic primitive...