Sciweavers

1013 search results - page 69 / 203
» A hardware implementation of realloc function
Sort
View
ICDCS
2003
IEEE
14 years 1 months ago
Obstruction-Free Synchronization: Double-Ended Queues as an Example
We introduce obstruction-freedom, a new nonblocking property for shared data structure implementations. This property is strong enough to avoid the problems associated with locks,...
Maurice Herlihy, Victor Luchangco, Mark Moir
FPGA
2001
ACM
162views FPGA» more  FPGA 2001»
14 years 12 days ago
Reprogrammable network packet processing on the field programmable port extender (FPX)
A prototype platform has been developed that allows processing of packets at the edge of a multi-gigabit-per-second network switch. This system, the Field Programmable Port Extend...
John W. Lockwood, Naji Naufel, Jonathan S. Turner,...
FROCOS
2005
Springer
14 years 1 months ago
Combination of Isabelle/HOL with Automatic Tools
We describe results and status of a sub project of the Verisoft [1] project. While the Verisoft project aims at verification of a complete computer system starting with hardware a...
Sergey Tverdyshev
CAV
2005
Springer
135views Hardware» more  CAV 2005»
14 years 1 months ago
Linear Ranking with Reachability
We present a complete method for synthesizing lexicographic linear ranking functions supported by inductive linear invariants for loops with linear guards and transitions. Proving ...
Aaron R. Bradley, Zohar Manna, Henny B. Sipma
EUROMICRO
2000
IEEE
14 years 10 days ago
A Simulink(c)-Based Approach to System Level Design and Architecture Selection
We propose a design flow for low-power and low-cost, data-dominated, embedded systems which tightly integrate different technologies and architectures. We use Mathworks’ Simuli...
Luciano Lavagno, Begoña Pino, Leonardo Mari...