1013 search results - page 92 / 203 » A hardware implementation of realloc function |
ISCAS
2003
IEEE
14 years 1 months ago
2003
IEEE
Spatial image processing chips, known as silicon retinas, are based on the architecture of vertebrate retina and can be mathematically represented as the Laplacian of Gaussian (LO...
CSREASAM
2006
13 years 9 months ago
2006
- Although Internet serves many contents and services, it has serious problems of security: the invasion of privacy, hacking and etc. To prevent these problems, two implementations...
DSD
2008
IEEE
13 years 8 months ago
2008
IEEE
Efficient utilization of multi-core architectures relies on the partitioning of applications into tasks and mapping the tasks to cores. In some applications (e.g. H.264 video deco...
ICS
1999
Tsinghua U.
14 years 8 days ago
1999
Tsinghua U.
The Virtual Interface (VI) Architecture provides protected userlevel communication with high delivered bandwidth and low permessage latency, particularly for small messages. The V...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...