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» A high performance JPEG2000 architecture
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ISPAN
2005
IEEE
14 years 2 months ago
An FPGA-Based Floating-Point Jacobi Iterative Solver
Within the parallel computing domain, field programmable gate arrays (FPGA) are no longer restricted to their traditional role as substitutes for application-specific integrated...
Gerald R. Morris, Viktor K. Prasanna
DATE
2000
IEEE
108views Hardware» more  DATE 2000»
14 years 1 months ago
A 50 Mbit/s Iterative Turbo-Decoder
Very low bit error rate has become an important constraint in high performance communication systems that operate at very low signal to noise ratios: due to their impressive codin...
F. Viglione, Guido Masera, Gianluca Piccinini, Mas...
DAMON
2006
Springer
14 years 1 months ago
Processing-in-memory technology for knowledge discovery algorithms
The goal of this work is to gain insight into whether processingin-memory (PIM) technology can be used to accelerate the performance of link discovery algorithms, which represent ...
Jafar Adibi, Tim Barrett, Spundun Bhatt, Hans Chal...
DSRT
2009
IEEE
14 years 17 days ago
An Approach for Parallel Interest Matching in Distributed Virtual Environments
—Interest management is essential for real-time large-scale distributed virtual environments (DVEs) which seeks to filter irrelevant messages on the network. Many existing inter...
Elvis S. Liu, Georgios K. Theodoropoulos
AC
2008
Springer
13 years 9 months ago
DARPA's HPCS Program- History, Models, Tools, Languages
The historical context surrounding the birth of the DARPA High Productivity Computing Systems (HPCS) program is important for understanding why federal government agencies launche...
Jack Dongarra, Robert Graybill, William Harrod, Ro...