Sciweavers

2209 search results - page 34 / 442
» A high performance JPEG2000 architecture
Sort
View
SPIESR
1996
118views Database» more  SPIESR 1996»
13 years 9 months ago
Performances of Multiprocessor Multidisk Architectures for Continuous Media Storage
Multimedia interfaces increase the need for large image databases, capable of storing and reading streams of data with strict synchronicity and isochronicity requirements. In orde...
Benoit A. Gennart, Vincent Messerli, Roger D. Hers...
CONNECTION
2007
87views more  CONNECTION 2007»
13 years 7 months ago
Efficient architectures for sparsely-connected high capacity associative memory models
In physical implementations of associative memory, wiring costs play a significant role in shaping patterns of connectivity. In this study of sparsely-connected associative memory...
Lee Calcraft, Rod Adams, Neil Davey
AUTOID
2005
IEEE
14 years 1 months ago
A Low Power and High Performance Analog Front End for Passive RFID Transponder
This paper presents a novel low power and high performance analog front end circuit for passive RFID transponder. With a novel architecture including three rectifier circuits, amo...
Jianyun Hu, Hao Min
CCGRID
2006
IEEE
13 years 11 months ago
Design of High Performance MVAPICH2: MPI2 over InfiniBand
MPICH2 provides a layered architecture for implementing MPI-2. In this paper, we provide a new design for implementing MPI-2 over InfiniBand by extending the MPICH2 ADI3 layer. Ou...
Wei Huang, Gopalakrishnan Santhanaraman, Hyun-Wook...
IJSNET
2007
115views more  IJSNET 2007»
13 years 7 months ago
Implementation and performance evaluation of nanoMAC: a low-power MAC solution for high density wireless sensor networks
: This paper describes the implementation architecture and performance analysis of nanoMAC, a CSMA/CA based medium access control protocol, which is specifically designed for high...
Junaid Ansari, Janne Riihijärvi, Petri Mä...