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» A high performance JPEG2000 architecture
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GLOBECOM
2006
IEEE
14 years 1 months ago
Interleaved Multistage Switching Fabrics for Scalable High Performance Routers
As the Internet grows exponentially, scalable high performance routers and switches on backbone are required to provide a large number of ports, higher throughput, lower delay late...
Rongsen He, José G. Delgado-Frias
TPDS
2008
140views more  TPDS 2008»
13 years 7 months ago
High-Performance Resource Allocation and Request Redirection Algorithms for Web Clusters
Abstract-- With increasing richness in features such as personalization of content, web applications are becoming more complex and hence compute intensive. Traditional approaches t...
Supranamaya Ranjan, Edward W. Knightly
ISCA
2009
IEEE
239views Hardware» more  ISCA 2009»
14 years 2 months ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju...
WEBNET
1997
13 years 9 months ago
Beyond Java: An Infrastructure for High-Performance Mobile Code on the World Wide Web
: We are building an infrastructure for the platform-independent distribution and execution of high-performance mobile code as a future Internet technology to complement and perhap...
Michael Franz
PC
2007
161views Management» more  PC 2007»
13 years 7 months ago
High performance combinatorial algorithm design on the Cell Broadband Engine processor
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
David A. Bader, Virat Agarwal, Kamesh Madduri, Seu...