Sciweavers

2209 search results - page 63 / 442
» A high performance JPEG2000 architecture
Sort
View
VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
14 years 10 months ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar
ISCA
1995
IEEE
118views Hardware» more  ISCA 1995»
14 years 1 months ago
The EM-X Parallel Computer: Architecture and Basic Performance
Latency tolerance is essential in achieving high performance on parallel computers for remote function calls and fine-grained remote memory accesses. EM-X supports interprocessor ...
Yuetsu Kodama, Hirohumi Sakane, Mitsuhisa Sato, Ha...
ASAP
2010
IEEE
138views Hardware» more  ASAP 2010»
13 years 11 months ago
Enhancing performance of network-on-chip architectures with millimeter-wave wireless interconnects
In a traditional Network-on-Chip (NoC), latency and power dissipation increase with system size due to its inherent multi-hop communications. The performance of NoC communication ...
Sujay Deb, Amlan Ganguly, Kevin Chang, Partha Prat...
ADT
2011
13 years 1 months ago
Virtual networks: isolation, performance, and trends
Currently, there is a strong effort of the research community in rethinking the Internet architecture to cope with its current limitations and support new requirements. Many resea...
Natalia Castro Fernandes, Marcelo D. D. Moreira, I...
DAGSTUHL
2011
12 years 10 months ago
Interactive Isocontouring of High-Order Surfaces
Scientists and engineers are making increasingly use of hp-adaptive discretization methods to compute simulations. While techniques for isocontouring the high-order data generated...
Christian Azambuja Pagot, Joachim E. Vollrath, Fil...