2209 search results - page 79 / 442 » A high performance JPEG2000 architecture |
SAMOS
2004
Springer
14 years 3 months ago
2004
Springer
In this paper we present a new approach for generating high-speed optimized event-driven register transfer level (RTL) compiled simulators. The generation of the simulators is part...
GLVLSI
2003
IEEE
14 years 3 months ago
2003
IEEE
In this paper a novel reseeding architecture for scan-based BIST, which uses an LFSR as TPG, is proposed. Multiple cells of the LFSR are utilized as sources for feeding the scan c...
ICC
2007
IEEE
14 years 2 months ago
2007
IEEE
In high-end grid networks, distributed resources (scientific instruments, CPUs, storages, etc.) are interconnected to support computing-intensive and data-intensive applications, w...
ARCS
2009
Springer
14 years 4 months ago
2009
Springer
Abstract. Java is widely deployed on a variety of processor architectures. Consequently, an understanding of microarchitecture level Java performance is critical to optimize curren...
SOSP
1997
ACM
13 years 11 months ago
1997
ACM
The exokernel operating system architecture safely gives untrusted software efficient control over hardware and software resources by separating management from protection. This ...