172 search results - page 23 / 35 » A high performance reconfigurable Motion Estimation hardware... |
FCCM
2005
IEEE
14 years 1 months ago
2005
IEEE
Increasing demands upon embedded systems for higher level services like networking, user interfaces and file system management, are driving growth in fully-featured operating syst...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
This paper presents an implementation of a high-performance network application layer parser in FPGAs. At the core of the architecture resides a pattern matcher and a parser. The ...
ISVLSI
2002
IEEE
14 years 12 days ago
2002
IEEE
Wavelet-based video compression can provide improved codec and bit rates. The shift-variance problem of the discrete wavelet transform on image sequences, however, may cause large...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
TCAD
2010
13 years 2 months ago
2010
For real-time applications, it is necessary to estimate the worst-case performance early in the design process without actual hardware implementation. While the non-preemptive task...