419 search results - page 19 / 84 » A hybrid framework for design and analysis of fault-tolerant... |
AINA
2006
IEEE
14 years 1 months ago
2006
IEEE
Performance analysis of agent network topologies helps multi-agent system developers to understand the impact of topology on system efficiency and effectiveness. Appropriate topol...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
Horizontally Partitioned Caches (HPCs) are a promising architectural feature to reduce the energy consumption of the memory subsystem. However, the energy reduction obtained using...
ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
WORDS
2003
IEEE
14 years 26 days ago
2003
IEEE
We present a framework that will enable scalable analysis and design of graceful degradation in distributed embedded systems. We define graceful degradation in terms of utility. A...
FCCM
2006
IEEE
14 years 1 months ago
2006
IEEE
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...