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ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
16 years 26 days ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
SOSP
2007
ACM
16 years 26 days ago
Sinfonia: a new paradigm for building scalable distributed systems
We propose a new paradigm for building scalable distributed systems. Our approach does not require dealing with message-passing protocols—a major complication in existing distri...
Marcos Kawazoe Aguilera, Arif Merchant, Mehul A. S...
ACSC
2009
IEEE
15 years 10 months ago
Fast and Compact Hash Tables for Integer Keys
A hash table is a fundamental data structure in computer science that can offer rapid storage and retrieval of data. A leading implementation for string keys is the cacheconscious...
Nikolas Askitis
IPPS
2009
IEEE
15 years 10 months ago
High-level estimation and trade-off analysis for adaptive real-time systems
We propose a novel design estimation method for adaptive streaming applications to be implemented on a partially reconfigurable FPGA. Based on experimental results we enable accu...
Ingo Sander, Jun Zhu, Axel Jantsch, Andreas Herrho...
ICCS
2009
Springer
15 years 10 months ago
Fast Conjugate Gradients with Multiple GPUs
The limiting factor for efficiency of sparse linear solvers is the memory bandwidth. In this work, we utilize GPU’s high memory bandwidth for implementation of a sparse iterative...
Ali Cevahir, Akira Nukada, Satoshi Matsuoka