315 search results - page 22 / 63 » A low complexity hardware architecture for motion estimation |
IJON
2006
13 years 7 months ago
2006
We propose a neural architecture that estimates the speed of motion. The basis is a two-dimensional map made of locally connected integrate-and-fire neurons, that propagates and i...
DFT
2006
IEEE
14 years 1 months ago
2006
IEEE
Image processing systems are increasingly used in safetycritical applications, and their hardening against soft errors becomes an issue. We propose a methodology to identify soft ...
ISCAS
1999
IEEE
13 years 12 months ago
1999
IEEE
The SOVA and the log-MAP are commonly used in turbo decoding. In this paper, we propose to modify the sliding window MAP-algorithm in [5]to reduce the computational delay even fur...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
SIPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Stochastic decoding is a new alternative method for low complexity decoding of error-correcting codes. This paper presents the first hardware architecture for stochastic decoding...