444 search results - page 10 / 89 » A low power high performance switched-current multiplier |
ICASSP
2011
IEEE
12 years 11 months ago
2011
IEEE
This paper presents a novel technique to mitigate effects of datapath and memory errors in JPEG implementations. These errors are mainly caused by voltage scaling and process vari...
ERSA
2006
13 years 8 months ago
2006
- This paper presents the design and implementation methodology of some low power programmable FIR filtering IP cores targeting SoRC and compares their performance in term of area,...
GLVLSI
2002
IEEE
14 years 11 days ago
2002
IEEE
We present a low-power sine-output Direct Digital Frequency Synthesizer (DDFS) realized in 0.18 µm CMOS that achieves 60 dBc spectral purity from DC to the Nyquist frequency. No ...
ISLPED
1997
ACM
13 years 11 months ago
1997
ACM
With the increasing performance and density of VLSI circuits as well as the popularity of portable devices such as personal digital assistance, power consumption has emerged as an...
ISVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper presents a two-stage CMOS differential voltage-controlled ring oscillator (VCO). The VCO is intended to operate as a frequency synthesizer in a PLL to generate local os...