48 search results - page 3 / 10 » A low voltage CMOS current source |
ISLPED
1995
ACM
13 years 10 months ago
1995
ACM
When estimating the dynamic power dissipated by a circuit di erent methods ranging from numeric analog simulation to event-driven logic simulation have been proposed. However, as ...
ISCAS
2005
IEEE
14 years 18 days ago
2005
IEEE
— A bandgap reference circuit employing subthreshold current is proposed. Only a small fraction of VBE is utilized to generate the reference voltage of 170mV. Since the subthresh...
EURODAC
1995
IEEE
13 years 10 months ago
1995
IEEE
Based on an explicit formulation of delays, an improved model for low voltage operation of CMOS inverter has been derived. Extrinsic and intrinsic effects, such as transistor curr...
ISCAS
2005
IEEE
14 years 18 days ago
2005
IEEE
— A CMOS operational amplifier with 110 dB CMRR/PSRR/gain is described. High CMRR is achieved using the cascoded input stage with high output impedance tail current source. A lat...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
— Sakurai-Newton (SN) delay metric [1] is a widely used closed form delay metric for CMOS gates because of simplicity and reasonable accuracy. Nevertheless it can be shown that t...