Robust analytical gate delay modeling for low voltage circuits

— Sakurai-Newton (SN) delay metric [1] is a widely used closed form delay metric for CMOS gates because of simplicity and reasonable accuracy. Nevertheless it can be shown that the SN metric fails to provide high accuracy and fidelity when CMOS gates operate at low supply voltages. Thus it may not be applicable in many low power applications with voltage scaling. In this paper, we propose a new closed form delay metric based on the centroid of power dissipation. This new metric is inspired by our key observation and theoretic proof that the SN delay is indeed Elmore delay, which can be viewed as the centroid of current. Our proposed metric has a very high correlation coefficient (≥ 0.98) compared with the HSPICE simulations. Such high correlation is consistent across all major process technologies. In comparison, the SN metric has a correlation coefficient between (0.70, 0.90) depending upon the technology and the CMOS gate, and it is less accurate for lower supply voltages. Sin...

• Type: Conference
• Year: 2006
• Where: ASPDAC
• Authors: Anand Ramalingam, Sreekumar V. Kodakara, Anirudh Devgan, David Z. Pan
• Keywords: ASPDAC 2006, Closed Form Delay, Cmos Gate, Metric