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VLSID
2005
IEEE
285views VLSI» more  VLSID 2005»
14 years 7 months ago
Power Monitors: A Framework for System-Level Power Estimation Using Heterogeneous Power Models
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
Nikhil Bansal, Kanishka Lahiri, Anand Raghunathan,...
DAC
2007
ACM
14 years 8 months ago
Gate Sizing For Cell Library-Based Designs
With increasing time-to-market pressure and shortening semiconductor product cycles, more and more chips are being designed with library-based methodologies. In spite of this shif...
Shiyan Hu, Mahesh Ketkar, Jiang Hu
CHI
2007
ACM
14 years 8 months ago
Meta-analysis of correlations among usability measures
Understanding the relation between usability measures seems crucial to deepen our conception of usability and to select the right measures for usability studies. We present a meta...
Kasper Hornbæk, Effie Lai-Chong Law
WWW
2009
ACM
14 years 8 months ago
Understanding user's query intent with wikipedia
Understanding the intent behind a user's query can help search engine to automatically route the query to some corresponding vertical search engines to obtain particularly re...
Jian Hu, Gang Wang, Frederick H. Lochovsky, Jian-T...
EMSOFT
2008
Springer
13 years 9 months ago
Tax-and-spend: democratic scheduling for real-time garbage collection
Real-time Garbage Collection (RTGC) has recently advanced to the point where it is being used in production for financial trading, military command-and-control, and telecommunicat...
Joshua S. Auerbach, David F. Bacon, Perry Cheng, D...