5215 search results - page 104 / 1043 » A model of normative power |
153
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FPGA
2006
ACM
15 years 10 months ago
2006
ACM
This paper examines the tradeoffs between flexibility, area, and power dissipation of programmable clock networks for FieldProgrammable Gate Arrays (FPGA's). The paper begins...
145
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ICCAD
2008
IEEE
16 years 3 months ago
2008
IEEE
In this paper we propose an on-chip bus PMU which makes accurate estimates of system power consumption from a first-order linear power model by utilizing system-level activity in...
150
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PATMOS
2007
Springer
16 years 12 days ago
2007
Springer
Energy efficiency is a top requirement in embedded system design. Understanding the complex issue of software power consumption in early design phases is of extreme importance to m...
162
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ICCAD
2006
IEEE
16 years 3 months ago
2006
IEEE
As CMOS technology scales into the nanometer regime, power dissipation and associated thermal concerns in high-performance ICs due to on-chip hot-spots and thermal gradients are b...
172
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ICC
2008
IEEE
16 years 22 days ago
2008
IEEE
—This paper addresses the joint estimator and power optimization problem for a sensor network whose mission is to estimate an unknown parameter. We assume a two-hop network where...