405 search results - page 64 / 81 » A novel cache architecture with enhanced performance and sec... |
ACSAC
2008
IEEE
14 years 2 months ago
2008
IEEE
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...
OOPSLA
2004
Springer
14 years 26 days ago
2004
Springer
As improvements in processor speed continue to outpace improvements in cache and memory speed, poor locality increasingly degrades performance. Because copying garbage collectors ...
CJ
2007
13 years 7 months ago
2007
In mobile environments transmitting information relevant to an event along with notification of the event has been proven to be an effective means of providing revenue enhancing s...
DAC
2008
ACM
13 years 9 months ago
2008
ACM
Battery lifetime and safety are primary concerns in the design of battery operated systems. Lifetime management is typically supervised by the system via battery-aware task schedu...
SIGOPS
2008
13 years 7 months ago
2008
The layered design of the Linux operating system hides the liveness of file system data from the underlying block layers. This lack of liveness information prevents the storage sy...