252 search results - page 23 / 51 » A novel high throughput reconfigurable FPGA architecture |
BIBE
2007
IEEE
13 years 10 months ago
2007
IEEE
In this paper we describe our design and characterization of a co-processor architecture to accelerate median-based phylogenetic reconstruction for generearrangement data. Our curr...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
- Parallel architectures have become an increasingly popular method in which to achieve high performance with low power consumption. In order to leverage these benefits, applicatio...
CVPR
1998
IEEE
14 years 10 months ago
1998
IEEE
We have designed and implemented a system for real-time detection of 2-D features on a reconfigurable computer based on Field Programmable Gate Arrays (FPGA `s). We envision this ...
DDECS
2008
IEEE
14 years 3 months ago
2008
IEEE
—A new FPGA implementation for adaptive median filters is proposed. Adaptive median filters exhibit better filtering properties than standard median filters; however, their i...
HPDC
1998
IEEE
14 years 1 months ago
1998
IEEE
Conventional resource management systems use a system model to describe resources and a centralized scheduler to control their allocation. We argue that this paradigm does not ada...