252 search results - page 32 / 51 » A novel high throughput reconfigurable FPGA architecture |
ERSA
2008
13 years 10 months ago
2008
This paper presents an accelerator for k-th nearest neighbor thinning, a run time intensive algorithmic kernel used in recent multi-objective optimizers. We discuss the thinning al...
CORR
2010
Springer
13 years 9 months ago
2010
Springer
Space is a spatial programming language designed to exploit the massive parallelism available in a formal model of computation called the Synchronic A-Ram, and physically related ...
PERCOM
2007
ACM
14 years 8 months ago
2007
ACM
To enhance the per node throughput, mesh nodes in wireless mesh networks can be equipped with multiple network interfaces (NIC). In this paper, we propose a new multi-interface equ...
FCCM
2004
IEEE
14 years 16 days ago
2004
IEEE
Searching for multiple string patterns in a stream of data is a computationally expensive task. The speed of the search pattern module determines the overall performance of deep p...
ARC
2007
Springer
14 years 3 months ago
2007
Springer
Abstract. The novel design of high-speed and low-energy FPGA routing architecture consisting of appropriate wire segments and multiple Switch Boxes is introduced. For that purpose,...