Sciweavers

339 search results - page 58 / 68
» A novel parallel deadlock detection algorithm and architectu...
Sort
View
TIFS
2010
128views more  TIFS 2010»
13 years 6 months ago
Steganalysis by subtractive pixel adjacency matrix
This paper presents a novel method for detection of steganographic methods that embed in the spatial domain by adding a low-amplitude independent stego signal, an example of which...
Tomás Pevný, Patrick Bas, Jessica J....
ICDCS
2008
IEEE
14 years 2 months ago
Distributed Divide-and-Conquer Techniques for Effective DDoS Attack Defenses
Distributed Denial-of-Service (DDoS) attacks have emerged as a popular means of causing mass targeted service disruptions, often for extended periods of time. The relative ease an...
Muthusrinivasan Muthuprasanna, Govindarasu Manimar...
FPGA
2004
ACM
163views FPGA» more  FPGA 2004»
14 years 4 days ago
Time and area efficient pattern matching on FPGAs
Pattern matching for network security and intrusion detection demands exceptionally high performance. Much work has been done in this field, and yet there is still significant roo...
Zachary K. Baker, Viktor K. Prasanna
DATE
2005
IEEE
135views Hardware» more  DATE 2005»
14 years 2 months ago
Compositional Memory Systems for Multimedia Communicating Tasks
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
ASPLOS
2008
ACM
13 years 10 months ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas