40 search results - page 5 / 8 » A novel sequential circuit optimization with clock gating lo... |
GECCO
2006
Springer
13 years 11 months ago
2006
Springer
Genetic Parallel Programming (GPP) is a novel Genetic Programming paradigm. Based on the GPP paradigm and a local search operator - FlowMap, a logic circuit synthesizing system in...
CORR
2006
Springer
13 years 7 months ago
2006
Springer
Differential Power Analysis (DPA) presents a major challenge to mathematically-secure cryptographic protocols. Attackers can break the encryption by measuring the energy consumed i...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
—Increasing power density causes die overheating due to limited cooling capacity of the package. Conventional thermal management techniques e.g. logic shutdown, clock gating, fre...
ISPD
2004
ACM
14 years 28 days ago
2004
ACM
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
SAMOS
2004
Springer
14 years 25 days ago
2004
Springer
A high-performance data-path to implement DSP kernels is proposed in this paper. The data-path is based on a flexible, universal, and regular component to optimally exploiting both...