6129 search results - page 102 / 1226 » A parallel LLL algorithm |
HIPC
2004
Springer
14 years 1 months ago
2004
Springer
Parasitic extraction techniques are used to estimate signal delay in VLSI chips. Inductance extraction is a critical component of the parasitic extraction process in which on-chip ...
PSB
2001
13 years 9 months ago
2001
This paper discusses the issues involved in implementing a dynamic programming algorithm for biological sequence comparison on a generalpurpose parallel computing platform based o...
CPHYSICS
2008
13 years 8 months ago
2008
A scalable parallel algorithm has been designed to perform multimillion-atom molecular dynamics (MD) simulations, in which first principlesbased reactive force fields (ReaxFF) des...
ISCAS
2011
IEEE
12 years 11 months ago
2011
IEEE
—We propose a multi-layer parallel decoding algorithm and VLSI architecture for decoding of structured quasi-cyclic low-density parity-check codes. In the conventional layered de...
ICPP
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—We present LeWI: a novel load balancing algorithm, that can balance applications with very different patterns of imbalance. Our algorithm can balance fine grain imbalan...