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» A power-configurable bus for embedded systems
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RTAS
1997
IEEE
13 years 11 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
CODES
2007
IEEE
14 years 1 months ago
Event-based re-training of statistical contention models for heterogeneous multiprocessors
Embedded single-chip heterogeneous multiprocessor (SCHM) systems experience frequent system events such as task preemption, power-saving voltage/frequency scaling, or arrival of n...
Alex Bobrek, JoAnn M. Paul, Donald E. Thomas
WOTUG
2007
13 years 8 months ago
A Process Oriented Approach to USB Driver Development
Abstract. Operating-systems are the core software component of many modern computer systems, ranging from small specialised embedded systems through to large distributed operating-...
Carl G. Ritson, Fred R. M. Barnes
CODES
2008
IEEE
14 years 1 months ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...
DAC
2007
ACM
13 years 11 months ago
Automotive Software Integration
A growing number of networked applications is implemented on increasingly complex automotive platforms with several bus standards and gateways. Together, they challenge the automo...
Razvan Racu, Arne Hamann, Rolf Ernst, Kai Richter