420 search results - page 46 / 84 » A pseudo-hierarchical methodology for high performance micro... |
ACSC
2003
IEEE
14 years 2 months ago
2003
IEEE
Clusters of commodity machines have become a popular way of building cheap high performance parallel computers. Many of these designs rely on standard Ethernet networks as a syste...
DATE
2007
IEEE
14 years 3 months ago
2007
IEEE
Future microprocessors will be highly susceptible to transient errors as the sizes of transistors decrease due to CMOS scaling. Prior techniques advocated full scale structural or...
EH
2004
IEEE
14 years 12 days ago
2004
IEEE
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
PARELEC
2000
IEEE
14 years 7 days ago
2000
IEEE
Recent advances in high-speed networks, rapid improvements in microprocessor design, and availability of highly performing clustering software implementations enables cost-effecti...
ICS
2001
Tsinghua U.
14 years 1 months ago
2001
Tsinghua U.
The caching behavior of multimedia applications has been described as having high instruction reference locality within small loops, very large working sets, and poor data cache p...