359 search results - page 21 / 72 » A section cache system designed for VLIW architectures |
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Code compression has been applied to embedded systems to minimize the silicon area utilized for program memories, and lower the power consumption. More recently, it has become a n...
DAC
2010
ACM
13 years 7 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
ICS
2005
Tsinghua U.
14 years 1 months ago
2005
Tsinghua U.
We consider a cluster architecture in which dynamic content is generated by a database back-end and a collection of Web and application server front-ends. We study the effect of t...
GLVLSI
2008
IEEE
14 years 2 months ago
2008
IEEE
Phase-based tuning methodologies specialize system parameters for each application phase of execution. Parameters are varied during execution, as opposed to remaining fixed as in ...
JSA
2008
13 years 7 months ago
2008
Architectural advancements in modern processor designs increase average performance with features such as pipelines, caches, branch prediction, and out-of-order execution. However...