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HPCA
2000
IEEE
14 years 1 months ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...
PADS
2005
ACM
14 years 2 months ago
The WarpIV Simulation Kernel
ct This paper provides an overview of the WarpIV Simulation Kernel that was designed to be an initial implementation of the Standard Simulation Architecture (SSA). WarpIV is the ne...
Jeffrey S. Steinman
CF
2009
ACM
14 years 3 months ago
Core monitors: monitoring performance in multicore processors
As we reach the limits of single-core computing, we are promised more and more cores in our systems. Modern architectures include many performance counters per core, but few or no...
Paul E. West, Yuval Peress, Gary S. Tyson, Sally A...
ICS
2004
Tsinghua U.
14 years 2 months ago
EXPERT: expedited simulation exploiting program behavior repetition
Studying program behavior is a central component in architectural designs. In this paper, we study and exploit one aspect of program behavior, the behavior repetition, to expedite...
Wei Liu, Michael C. Huang
AGENTS
1997
Springer
14 years 1 months ago
Agent-Based Expert Assistance for Visual Problem Solving
This paper presents a domain-independent architecture for facilitating visual problem solving between robots or softbots and humans. The architecture de nes virtual and human agen...
Erika Rogers, Robin R. Murphy, Barb Ericson