Sciweavers

132 search results - page 21 / 27
» A statistical multiprocessor cache model
Sort
View
HPCA
1997
IEEE
14 years 1 months ago
Global Address Space, Non-Uniform Bandwidth: A Memory System Performance Characterization of Parallel Systems
Many parallel systems offer a simple view of memory: all storage cells are addresseduniformly. Despite a uniform view of the memory, the machines differsignificantly in theirmemo...
Thomas Stricker, Thomas R. Gross
SAS
2007
Springer
126views Formal Methods» more  SAS 2007»
14 years 3 months ago
Hierarchical Pointer Analysis for Distributed Programs
We present a new pointer analysis for use in shared memory programs running on hierarchical parallel machines. The analysis is motivated by the partitioned global address space lan...
Amir Kamil, Katherine A. Yelick
EUROIMSA
2006
299views Multimedia» more  EUROIMSA 2006»
13 years 11 months ago
Behavior Modeling using Bigram Frequencies for Client-Side Link Prefetching
The perceived latency for a user surfing the Internet is the target of a transparent and speculative algorithm that relies on a user behavior model. The model is based on past use...
Apostolos Georgakis, Haibo Li, Mihaela Gordan
HICSS
1997
IEEE
109views Biometrics» more  HICSS 1997»
14 years 1 months ago
Performance Evaluation of a C++ Library Based Multithreaded System
One model of multithreading gaining popularity on multiprocessor systems is the message-driven model of computation. The message-driven model is a reactive model in which an arriv...
John G. Holm, Steven Parkes, Prithviraj Banerjee
IEEEPACT
2003
IEEE
14 years 3 months ago
Design Trade-Offs in High-Throughput Coherence Controllers
Recent research shows that the high occupancy of Coherence Controllers (CCs) is a major performance bottleneck in scalable shared-memory multiprocessors. In this paper, we propose...
Anthony-Trung Nguyen, Josep Torrellas