132 search results - page 7 / 27 » A statistical multiprocessor cache model |
EUC
2006
Springer
14 years 1 months ago
2006
Springer
We present the first Utility Accrual (or UA) real-time scheduling algorithm for multiprocessors, called gMUA. The algorithm considers an application model where real-time activiti...
ANSS
1995
IEEE
14 years 1 months ago
1995
IEEE
In this paper we present simulation algorithmsthat characterize the main sources of communication generated by parallel applications under both invalidate and updatebased cache co...
ISPASS
2005
IEEE
14 years 3 months ago
2005
IEEE
We introduce a fast and accurate technique for initializing the directory and cache state of a multiprocessor system based on a novel software structure called the memory timestam...
HPCC
2005
Springer
14 years 3 months ago
2005
Springer
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
IEEEPACT
2006
IEEE
14 years 3 months ago
2006
IEEE
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...