132 search results - page 8 / 27 » A statistical multiprocessor cache model |
IEEEPACT
2009
IEEE
14 years 4 months ago
2009
IEEE
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...
CC
2010
Springer
14 years 4 months ago
2010
Springer
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
INFORMATICALT
2006
13 years 9 months ago
2006
This paper investigates a variety of statistical cache-based language models built upon three corpora: English, Lithuanian, and Lithuanian base forms. The impact of the cache size,...
ISPASS
2003
IEEE
14 years 3 months ago
2003
IEEE
This paper presents a statistical model for explaining why skewed-associativity removes conflicts better than setassociativity. We show that, with a high probability, 2-way skewe...
HPCA
2000
IEEE
14 years 2 months ago
2000
IEEE
Abstract—Sharing patterns in shared-memory multiprocessors are the key to performance: uniprocessor latencytolerating techniques such as out-of-order execution and non-blocking c...