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ASPLOS
1991
ACM
14 years 3 days ago
Performance Evaluation of Memory Consistency Models for Shared Memory Multiprocessors
The memory consistency model supported by a multiprocessor architecture determines the amount of buffering and pipelining that may be used to hide or reduce the latency of memory ...
Kourosh Gharachorloo, Anoop Gupta, John L. Henness...
PARLE
1994
14 years 20 days ago
Using Reference Counters in Update-Based Coherent Memory
Abstract. As the disparity between processor and memory speed continues to widen, the exploitation of locality of reference in shared-memory multiprocessors becomes an increasingly...
Evangelos P. Markatos, Catherine E. Chronaki
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
14 years 5 months ago
Reliability Support for On-Chip Memories Using Networks-on-Chip
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
Federico Angiolini, David Atienza, Srinivasan Mura...
FGCS
2006
119views more  FGCS 2006»
13 years 8 months ago
Simulation tools to study a distributed shared memory for clusters of symmetric multiprocessors
Distributed shared memory (DSM) systems have become popular as a means of utilizing clusters of computers for solving large applications. We have developed a high-performance DSM,...
Darshan Thaker, Vipin Chaudhary
ASAP
2005
IEEE
104views Hardware» more  ASAP 2005»
14 years 2 months ago
Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application
Users expect future handhelddevices to provide extended multimedia functionality and have long battery life. This type of application imposes heavy constraints on performance and ...
Andy Lambrechts, Praveen Raghavan, Anthony Leroy, ...