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» A study of slipstream processors
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ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
13 years 11 months ago
Software Versus Hardware Shared-Memory Implementation: A Case Study
We comparethe performance of software-supported shared memory on a general-purpose network to hardware-supported shared memory on a dedicated interconnect. Up to eight processors,...
Alan L. Cox, Sandhya Dwarkadas, Peter J. Keleher, ...
JSW
2007
126views more  JSW 2007»
13 years 7 months ago
Supporting UML Sequence Diagrams with a Processor Net Approach
— UML sequence diagrams focus on the interaction between different classes. For distributed real time transaction processing it is possible to end up with complex sequence diagra...
Tony Spiteri Staines
MVA
1992
143views Computer Vision» more  MVA 1992»
13 years 8 months ago
A Real-Time Vision System Using Integrated Memory Array Processor Prototype LSI
This study reports on the performance of a Real-Time Vision System (RVS) and its use of an IMAP prototype LSI. This LSI integrates eight 8 bit processors and a 144 Kbit SRAM on a ...
Yoshihiro Fujita, Nobuyuki Yamashita, Shin'ichiro ...
PE
2006
Springer
115views Optimization» more  PE 2006»
13 years 7 months ago
Optimal processor allocation to differentiated job flows
In this paper, we study the problem of dynamic allocation of the resources of a general parallel processing system, comprised of M heterogeneous processors and M heterogeneous tra...
Kimberly M. Wasserman, George Michailidis, Nichola...
JSA
2007
115views more  JSA 2007»
13 years 7 months ago
Speculative trivialization point advancing in high-performance processors
Trivial instructions are those instructions whose output can be determined without performing the actual computation. This is due to the fact that for these instructions the outpu...
Ehsan Atoofian, Amirali Baniasadi