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CGO
2004
IEEE
14 years 2 months ago
Specialized Dynamic Optimizations for High-Performance Energy-Efficient Microarchitecture
We study several major characteristics of dynamic optimization within the PARROT power-aware, trace-cachebased microarchitectural framework. We investigate the benefit of providin...
Yoav Almog, Roni Rosner, Naftali Schwartz, Ari Sch...
CAMAD
2006
IEEE
14 years 2 months ago
Improving quality of service for switched processing systems
Switched Processing Systems (SPS) capture the essence of a fundamental resource allocation problem in many modern communication, computer and manufacturing systems involving hetero...
Ying-Chao Hung, George Michailidis
DSD
2006
IEEE
135views Hardware» more  DSD 2006»
14 years 1 months ago
Hardware-Software Codesign of a Vector Co-processor for Public Key Cryptography
Until now, most cryptography implementations on parallel architectures have focused on adapting the software to SIMD architectures initially meant for media applications. In this ...
Jacques J. A. Fournier, Simon W. Moore
ASPDAC
2001
ACM
100views Hardware» more  ASPDAC 2001»
14 years 1 months ago
Low power implementation of a turbo-decoder on programmable architectures
Low Power is an extremely important issue for future mobile radio systems. Channel decoders are essential building blocks of base-band signal processing units in mobile terminal ar...
Frank Gilbert, Alexander Worm, Norbert Wehn
HPCA
1995
IEEE
14 years 1 months ago
Program Balance and Its Impact on High Performance RISC Architectures
Information on the behavior of programs is essential for deciding the number and nature of functional units in high performance architectures. In this paper, we present studies on...
Lizy Kurian John, Vinod Reddy, Paul T. Hulina, Lee...